Freescale Semiconductor MPC5604B - Page 20

MPC5604B/C Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor 9
17.6.1 Overview ......................................................................................................................302
17.6.2 General operation .........................................................................................................303
17.6.3 Master ports ..................................................................................................................303
17.6.4 Slave ports ....................................................................................................................304
17.6.5 Priority assignment .......................................................................................................304
17.6.6 Arbitration ....................................................................................................................304
Chapter 18
Memory Protection Unit (MPU)
18.1 Introduction ...................................................................................................................................307
18.2 Features .........................................................................................................................................308
18.3 Modes of operation ........................................................................................................................309
18.4 External signal description ............................................................................................................309
18.5 Memory map and register description ...........................................................................................309
18.5.1 Memory map ................................................................................................................309
18.5.2 Register description ......................................................................................................310
18.6 Functional description ...................................................................................................................322
18.6.1 Access evaluation macro ..............................................................................................322
18.6.2 Putting it all together and AHB error terminations ......................................................324
18.7 Initialization information ...............................................................................................................324
18.8 Application information ................................................................................................................324
Chapter 19
System Integration Unit Lite (SIUL)
19.1 Introduction ...................................................................................................................................327
19.2 Overview .......................................................................................................................................327
19.3 Features .........................................................................................................................................329
19.4 External signal description ............................................................................................................329
19.4.1 Detailed signal descriptions ..........................................................................................330
19.5 Memory map and register description ...........................................................................................331
19.5.1 SIUL memory map .......................................................................................................331
19.5.2 Register protection ........................................................................................................332
19.5.3 Register descriptions ....................................................................................................333
19.6 Functional description ...................................................................................................................350
19.6.1 Pad control ....................................................................................................................350
19.6.2 General purpose input and output pads (GPIO) ...........................................................350
19.6.3 External interrupts ........................................................................................................351
19.7 Pin muxing ....................................................................................................................................352
Chapter 20
Inter-Integrated Circuit Bus Controller Module (I
2
C)
20.1 Introduction ...................................................................................................................................355
20.1.1 Overview ......................................................................................................................355
20.1.2 Features .........................................................................................................................355
20.1.3 Block diagram ..............................................................................................................356