MPC5604B/C Microcontroller Reference Manual, Rev. 8
194 Freescale Semiconductor
9.3.1.2 Destructive Event Status Register (RGM_DES)
This register contains the status of the last asserted destructive reset sources. It can be accessed in
read/write on either supervisor mode or test mode. Register bits are cleared on write ‘1’.
F_SOFT Flag for software reset
0 No software reset event has occurred since either the last clear or the last destructive reset
assertion
1 A software reset event has occurred
F_CORE Flag for debug control core reset
0 No debug control core reset event has occurred since either the last clear or the last destructive
reset assertion
1 A debug control core reset event has occurred; this event can only be asserted when the
DBCR0[RST] field is set by an external debugger. See the "Debug Support" chapter of the core
reference manual for more details.
F_JTAG Flag for JTAG initiated reset
0 No JTAG initiated reset event has occurred since either the last clear or the last destructive reset
assertion
1 A JTAG initiated reset event has occurred
Address 0xC3FE_4002 Access: Supervisor read/write
0123456789101112131415
R
F_POR
00000000000
F_LVD27
F_SWT
F_LVD12_PD1
F_LVD12_PD0
Ww1c
POR1000000000000000
Figure 9-3. Destructive Event Status Register (RGM_DES)
Table 9-4. Destructive Event Status Register (RGM_DES) Field Descriptions
Field Description
F_POR Flag for Power-On reset
0 No power-on event has occurred since the last clear (due to either a software clear or a low-voltage
detection)
1 A power-on event has occurred
F_LVD27 Flag for 2.7 V low-voltage detected
0 No 2.7 V low-voltage detected event has occurred since either the last clear or the last power-on
reset assertion
1 A 2.7 V low-voltage detected event has occurred
Table 9-3. Functional Event Status Register (RGM_FES) Field Descriptions (continued)
Field Description
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