MPC5604B/C Microcontroller Reference Manual, Rev. 8
274 Freescale Semiconductor
16.5.2.2 INTC Current Priority Register for Processor (INTC_CPR)
Offset: 0x0000 Access: User read/write
0123456789101112131415
R0000000000000000
W
Reset
0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R0000000000
VTES
0000
HVEN
W
Reset
0000000000000000
Figure 16-2. INTC Module Configuration Register (INTC_MCR)
Table 16-3. INTC_MCR field descriptions
Field Description
VTES Vector table entry size.
Controls the number of ‘0’s to the right of INTVEC in Section 16.5.2.3, “INTC Interrupt Acknowledge
Register (INTC_IACKR). If the contents of INTC_IACKR are used as an address of an entry in a
vectortable as in software vector mode, then the number of rightmost ‘0’s will determine the size of
each vector table entry. VTES impacts software vector mode operation but also affects
INTC_IACKR[INTVEC] position in both hardware vector mode and software vector mode.
0 4 bytes
1 8 bytes
HVEN Hardware vector enable.
Controls whether the INTC is in hardware vector mode or software vector mode. Refer to Section 16.4,
“Modes of operation, for the details of the handshaking with the processor in each mode.
0 Software vector mode
1 Hardware vector mode
Offset: 0x0008 Access: User read/write
012345678910111213141516171819202122232425262728293031
R0000000000000000000000000000
PRI
W
Reset00000000000000000000000000001111
Figure 16-3. INTC Current Priority Register (INTC_CPR)
Table 16-4. INTC_CPR field descriptions
Field Description
PRI Priority
PRI is the priority of the currently executing ISR according to the field values defined in Tabl e 16-5.
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