MPC5604B/C Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor 21
20 Inter-Integrated Circuit Bus
Controller Module (I2C)
These chapters describe the configuration and
operation of the various communication modules.
Some of these modules support eDMA requests to fill
/ empty buffer queues to minimize CPU overhead.
Communication
modules
21 LIN Controller (LINFlex)
22 FlexCAN
23 Deserial Serial Peripheral
Interface (DSPI)
24 Timers Timer modules
• Technical overview Gives an overview of the available system timer
modules showing links to other modules as well as
tables detailing the external pins associated with
eMIOS timer channels.
• System Timer Module
(STM)
A simple 32-bit free running counter with 4 compare
channels with interrupt on match. It can be read at any
time; this is very useful for measuring execution times.
• Enhanced Modular IO
Subsystem (eMIOS)
Highly configurable timer module(s) supporting PWM,
output compare and input capture features. Includes
interrupt and eDMA support.
• Periodic Interrupt Timer
(PIT)
Set of 32-bit countdown timers that provide periodic
events (which can trigger an interrupt) with automatic
re-load.
25 Analog-to-Digital Converter
(ADC)
Details the configuration and operation of the ADC
modules as well as detailing the channels that are
shared between the 10-bit and 12-bit ADC. The ADC
is tightly linked to the INTC, eDMA, PIT_RTI and CTU.
When used in conjunction with these other modules,
the CPU overhead for an ADC conversion is
significantly reduced.
ADC system
26 Cross Triggering Unit (CTU) The CTU allows an ADC conversion to be
automatically triggered based on an eMIOS event (like
a PWM output going high) or a PIT_RTI event with no
CPU intervention.
27 Flash Memory Details the code and data flash memory structure
(with ECC), block sizes and the flash memory port
configuration, including wait states, line buffer
configuration and pre-fetch control.
Memory
28 Static RAM (SRAM) Details the structure of the SRAM (with ECC). There
are no user configurable registers associated with the
SRAM.
Table 1-1. Guide to this reference manual (continued)
Chapter
Description Functional group
#Title
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