MPC5604B/C Microcontroller Reference Manual, Rev. 8
316 Freescale Semiconductor
Writes to this word clear the region descriptor’s valid bit (see Section 18.5.2.4.4, “MPU Region Descriptor
n, Word 3 (MPU_RGDn.Word3) for more information). Since it is also expected that system software may
adjust only the access controls within a region descriptor (MPU_RGDn.Word2) as different tasks execute,
an alternate programming view of this 32-bit entity is provided. If only the access controls are being
updated, this operation should be performed by writing to MPU_RGDAACn (Alternate Access Control n)
as stores to these locations do not affect the descriptor’s valid bit.
Offset: 0x400 + (16*n) + 0x8 (MPU_RGDn.Word2) Access: R/W
0123456789101112131415
R
M7RE
M7WE
M6RE
M6WE
M5RE
M5WE
M4RE
M4WE
M3PE
M3SM M3UM
M2PE
M2SM[1]
W
Reset––––––––––––––––
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
M2SM[0]
M2UM
M1PE
M1SM M1UM
M0PE
M0SM M0UM
W
Reset––––––––––––––––
Figure 18-7. MPU Region Descriptor, Word 2 Register (MPU_RGDn.Word2)
Table 18-7. MPU_RGDn.Word2 field descriptions
Field Description
M7RE Bus master 7 read enable
If set, this flag allows bus master 7 to perform read operations. If cleared, any attempted read by bus
master 7 terminates with an access error and the read is not performed.
M7WE Bus master 7 write enable
If set, this flag allows bus master 7 to perform write operations. If cleared, any attempted write by bus
master 7 terminates with an access error and the write is not performed.
M6RE Bus master 6 read enable
If set, this flag allows bus master 6 to perform read operations. If cleared, any attempted read by bus
master 6 terminates with an access error and the read is not performed.
M6WE Bus master 6 write enable
If set, this flag allows bus master 6 to perform write operations. If cleared, any attempted write by bus
master 6 terminates with an access error and the write is not performed.
M5RE Bus master 5 read enable
If set, this flag allows bus master 5 to perform read operations. If cleared, any attempted read by bus
master 5 terminates with an access error and the read is not performed.
M5WE Bus master 5 write enable
If set, this flag allows bus master 5 to perform write operations. If cleared, any attempted write by bus
master 5 terminates with an access error and the write is not performed.
M4RE Bus master 4 read enable
If set, this flag allows bus master 4 to perform read operations. If cleared, any attempted read by bus
master 4 terminates with an access error and the read is not performed.
To Next Page
Loading...
