MPC5604B/C Microcontroller Reference Manual, Rev. 8
576 Freescale Semiconductor
Figure 24-51. Input programmable filter example
The filter is not disabled during either freeze state or negated GTBE input.
24.4.4.1.3 Clock Prescaler (CP)
The CP divides the GCP output signal to generate a clock enable for the internal counter of the Unified
Channels. The GCP output signal is prescaled by the value defined in Figure 24-18 according to the
UCPRE[0:1] bits in EMIOSC[n] register. The prescaler is enabled by setting the UCPREN bit in the
EMIOSC[n] and can be stopped at any time by clearing this bit, thereby stopping the internal counter in
the Unified Channel.
In order to ensure safe working and avoid glitches the following steps must be performed whenever any
update in the prescaling rate is desired:
1. Write 0 at both GPREN bit in EMIOSMCR register and UCPREN bit in EMIOSC[n] register, thus
disabling prescalers;
2. Write the desired value for prescaling rate at UCPRE[0:1] bits in EMIOSC[n] register;
3. Enable channel prescaler by writing 1 at UCPREN bit in EMIOSC[n] register;
4. Enable global prescaler by writing 1 at GPREN bit in EMIOSMCR register.
The prescaler is not disabled during either freeze state or negated GTBE input.
24.4.4.1.4 Effect of Freeze on the Unified Channel
When in debug mode, bit FRZ in the EMIOSMCR and bit FREN in the EMIOSC[n] register are both set,
the internal counter and Unified Channel capture and compare functions are halted. The UC is frozen in
its current state.
During freeze, all registers are accessible. When the Unified Channel is operating in an output mode, the
force match functions remain available, allowing the software to force the output to the desired level.
Note that for input modes, any input events that may occur while the channel is frozen are ignored.
When exiting debug mode or freeze enable bit is cleared (FRZ in the EMIOSMCR or FREN in the
EMIOSC[n] register) the channel actions resume, but may be inconsistent until channel enters GPIO mode
again.
Time
selected clock
EMIOSI
5-bit counter
filter out
IF[0:3] = 0010
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