MPC5604B/C Microcontroller Reference Manual, Rev. 8
712 Freescale Semiconductor
data1 = UMISR1; /* Read UMISR1 content (expected 0xAAAAAAAA) */
data2 = UMISR2; /* Read UMISR2 content (expected 0x55555555) */
data3 = UMISR3; /* Read UMISR3 content (expected 0xAAAAAAAA) */
data4 = UMISR4; /* Read UMISR4 content (expected 0x00FF00FF) */
UT0 = 0x00000000; /* Reset UTE, AIE and EIE in UT0: Operation End */
27.6.3.3 Error correction code
The flash memory module provides a method to improve the reliability of the data stored in flash memory:
the usage of an Error Correction Code. The word size is fixed at 64 bits.
Eight ECC bits, programmed to guarantee a Single Error Correction and a Double Error Detection
(SEC-DED), are associated to each 64-bit Double Word.
ECC circuitry provides correction of single bit faults and is used to achieve automotive reliability targets.
Some units will experience single bit corrections throughout the life of the product with no impact to
product reliability.
27.6.3.3.1 ECC algorithms
The flash memory module supports one ECC Algorithm: “All ‘1’s No Error”. A modified Hamming code
is used that ensures the all erased state (that is, 0xFFFF.....FFFF) data is a valid state, and will not cause an
ECC error. This allows the user to perform a blank check after a sector erase operation.
27.6.3.4 EEPROM emulation
The choosen ECC algorithm allows some bit manipulations so that a Double Word can be rewritten several
times without needing an erase of the sector. This allows to use a Double Word to store flags useful for the
Eeprom Emulation. As an example the choosen ECC algorithm allows to start from an All ‘1’s Double
Word value and rewrite whichever of its four 16-bits Half-Words to an All ‘0’s content by keeping the same
ECC value.
Table 27-55 shows a set of Double Words sharing the same ECC value.
Table 27-55. Bit manipulation: Double words with the same ECC value
Double word ECC all ‘1’s no error
0xFFFF_FFFF_FFFF_FFFF 0xFF
0xFFFF_FFFF_FFFF_0000 0xFF
0xFFFF_FFFF_0000_FFFF 0xFF
0xFFFF_0000_FFFF_FFFF 0xFF
0x0000_FFFF_FFFF_FFFF 0xFF
0xFFFF_FFFF_0000_0000 0xFF
0xFFFF_0000_FFFF_0000 0xFF
0x0000_FFFF_FFFF_0000 0xFF
0xFFFF_0000_0000_FFFF 0xFF
0x0000_FFFF_0000_FFFF 0xFF
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