Freescale Semiconductor MPC5604B - Page 818

MPC5604B/C Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor 807
NOTE
The mode or clock division must not be modified after MCKO has been
enabled. Changing the mode or clock division while MCKO is enabled can
produce unpredictable results.
Reg Index: 127 Access: User read/write
0123456789101112131415
RFPM MCKO
_GT
MCKO
_EN
MCKO_DIV EVT
_EN
000000000
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
RLP_
DBG_
EN
00000SLEEP
_SYNC
STOP_
SYNC
0000000PSTAT
_EN
W
Reset0000000000000000
Figure 33-4. Port Configuration Register (PCR)
Table 33-4. PCR field descriptions
Field Description
0
FPM
Full Port Mode
The value of the FPM bit determines if the auxiliary output port uses the full MDO port or a reduced
MDO port to transmit messages.
0 A subset of MDO pins are used to transmit messages.
1 All MDO pins are used to transmit messages.
1
MCKO_GT
MCKO Clock Gating Control
This bit is used to enable or disable MCKO clock gating. If clock gating is enabled, the MCKO clock
is gated when the NPC is in enabled mode but not actively transmitting messages on the auxiliary
output port. When clock gating is disabled, MCKO is allowed to run even if no auxiliary output port
messages are being transmitted.
0 MCKO gating is disabled.
1 MCKO gating is enabled.
2
MCKO_EN
MCKO Enable
This bit enables the MCKO clock to run. When enabled, the frequency of MCKO is determined by
the MCKO_DIV field.
0 MCKO clock is driven to zero.
1 MCKO clock is enabled.