Intel ARCHITECTURE IA-32 User Manual

IA-32 Intel® Architecture Optimization
2-60
desired numeric precision, the size of the look-up tableland taking advantage
of the parallelism of the Streaming SIMD Extensions and the Streaming SIMD
Extensions 2 instructions.
Floating-point Modes and Exceptions
When working with floating-point numbers, high-speed
microprocessors frequently must deal with situations that need special
handling in hardware or code. The Pentium 4 processor is optimized to
handle the most common cases of such situations efficiently.
Floating-point Exceptions
The most frequent situation that can lead to performance degradation
involve masked floating-point exception conditions such as:
• arithmetic overflow
• arithmetic underflow
• denormalized operand
Refer to Chapter 4 of the IA-32 Intel® Architecture Software
Developer’s Manual, Volume 1 for the definition of overflow, underflow
and denormal exceptions.
Denormalized floating-point numbers impact performance in two ways:
• directly: when they are used as operands
• indirectly: when they are produced as a result of an underflow
situation
If a floating-point application never underflows, the denormals can only
come from floating-point constants.
User/Source Coding Rule 16. (H impact, ML generality) Denormalized
floating-point constants should be avoided as much as possible.
Denormal and arithmetic underflow exceptions can occur during the
execution of x87 instructions or SSE/SSE2/SSE3 instructions. The
Pentium 4 processor handles these exceptions more efficiently when

Intel ARCHITECTURE IA-32 Specifications

General

Instruction Set	x86
Instruction Set Type	CISC
Memory Segmentation	Supported
Operating Modes	Real mode, Protected mode, Virtual 8086 mode
Max Physical Address Size	36 bits (with PAE)
Max Virtual Address Size	32 bits
Architecture	IA-32 (Intel Architecture 32-bit)
Addressable Memory	4 GB (with Physical Address Extension up to 64 GB)
Floating Point Registers	8 x 80-bit
MMX Registers	8 x 64-bit
SSE Registers	8 x 128-bit
Registers	General-purpose registers (EAX, EBX, ECX, EDX, ESI, EDI, ESP, EBP), Segment registers (CS, DS, SS, ES, FS, GS), Instruction pointer (EIP), Flags register (EFLAGS)
Floating Point Unit	Yes (x87)