Intel ARCHITECTURE IA-32 User Manual

Optimizing for SIMD Integer Applications 4
4-29
packed-subtract instructions with unsigned saturation, thus this
technique can only be used on packed-bytes and packed-words data
types.
The example illustrates the operation on word values.
Packed Max/Min of Signed Word and Unsigned Byte
Signed Word
The pmaxsw instruction returns the maximum between the four signed
words in either two SIMD registers, or one SIMD register and a
memory location.
The
pminsw instruction returns the minimum between the four signed
words in either two SIMD registers, or one SIMD register and a
memory location.
Example 4-22 Clipping to an Arbitrary Unsigned Range [high, low]
; Input:
; MM0 unsigned source operands
; Output:
; MM1 unsigned operands clipped to the unsigned
; range [HIGH, LOW]
paddusw MM0, 0xffff - high
; in effect this clips to high
psubusw MM0, (0xffff - high + low)
; in effect this clips to low
paddw MM0, low
; undo the previous two offsets

Intel ARCHITECTURE IA-32 Specifications

General

Instruction Set	x86
Instruction Set Type	CISC
Memory Segmentation	Supported
Operating Modes	Real mode, Protected mode, Virtual 8086 mode
Max Physical Address Size	36 bits (with PAE)
Max Virtual Address Size	32 bits
Architecture	IA-32 (Intel Architecture 32-bit)
Addressable Memory	4 GB (with Physical Address Extension up to 64 GB)
Floating Point Registers	8 x 80-bit
MMX Registers	8 x 64-bit
SSE Registers	8 x 128-bit
Registers	General-purpose registers (EAX, EBX, ECX, EDX, ESI, EDI, ESP, EBP), Segment registers (CS, DS, SS, ES, FS, GS), Instruction pointer (EIP), Flags register (EFLAGS)
Floating Point Unit	Yes (x87)