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Intel ARCHITECTURE IA-32 User Manual

Intel ARCHITECTURE IA-32
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IA-32 Intel® Architecture Optimization
B-4
miss more than once during its life time, but a Misses Retired metric
(for example, 1
st
-Level Cache Misses Retired) will increment only once
for that
μop.
Counting Clocks
The count of cycles, also known as clock ticks, forms a fundamental
basis for measuring how long a program takes to execute, and as part of
efficiency ratios like cycles per instruction (CPI). Some processor
clocks may stop “ticking” under certain circumstances:
The processor is halted, e.g. during I/O, there may be nothing for the
CPU to do while servicing a disk read request, and the processor
may halt to save power. When Hyper-Threading Technology is
enabled, both logical processors must be halted for
performance-monitoring-related counters to be powered down.
The processor is asleep, either as a result of being halted for a while,
or as part of a power-management scheme. Note that there are
different levels of sleep, and in the deeper sleep levels, the
timestamp counter stops counting.
This section describes three mechanisms to count processor clock cycles
for monitoring performance. They are:
Non-Halted Clockticks: clocks when the specified logical
processor is not halted nor in any power-saving states. These can be
measured on a per-logical-processor basis, when Hyper-Threading
Technology is enabled.
Non-Sleep Clockticks: clocks when the physical processor is not in
any of the sleep modes, nor power-saving states. These cannot be
measured on a per-logical- processor basis.
Timestamp Counter: clocks when the physical processor is not in
deep sleep. These cannot be measured on a per-logical-processor
basis.

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Intel ARCHITECTURE IA-32 Specifications

General IconGeneral
Instruction Setx86
Instruction Set TypeCISC
Memory SegmentationSupported
Operating ModesReal mode, Protected mode, Virtual 8086 mode
Max Physical Address Size36 bits (with PAE)
Max Virtual Address Size32 bits
ArchitectureIA-32 (Intel Architecture 32-bit)
Addressable Memory4 GB (with Physical Address Extension up to 64 GB)
Floating Point Registers8 x 80-bit
MMX Registers8 x 64-bit
SSE Registers8 x 128-bit
RegistersGeneral-purpose registers (EAX, EBX, ECX, EDX, ESI, EDI, ESP, EBP), Segment registers (CS, DS, SS, ES, FS, GS), Instruction pointer (EIP), Flags register (EFLAGS)
Floating Point UnitYes (x87)

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