Intel ARCHITECTURE IA-32 User Manual

IA-32 Intel® Architecture Optimization
A-6
Multithreading with OpenMP*
Both the Intel C++ and Fortran Compilers support shared memory
parallelism via OpenMP compiler directives, library functions and
environment variables. OpenMP directives are activated by the compiler
switch
-Qopenmp. The available directives are described in the Compiler
User's Guides available with the Intel C++ and Fortran Compilers.
Further information about the OpenMP standard is available at
http://www.openmp.org.
Automatic Multithreading
Both the Intel C++ and Fortran Compilers can generate multithreaded
code automatically for simple loops with no dependencies. This is
activated by the compiler switch -Qparallel.
Inline Expansion of Library Functions (-Oi, -Oi-)
The compiler inlines a number of standard C, C++, and math library
functions by default. This usually results in faster execution of your
program. Sometimes, however, inline expansion of library functions can
cause unexpected results. For explanation, see the Intel
®
C++ Compiler
User’s Guide.
Floating-point Arithmetic Precision (-Op, -Op-, -Qprec,
-Qprec_div, -Qpc, -Qlong_double)
These options provide a means of controlling optimization that might
result in a small change in the precision of floating-point arithmetic.
Rounding Control Option (-Qrcd)
The compiler uses the -Qrcd option to improve the performance of
code that requires floating-point calculations. The optimization is
obtained by controlling the change of the rounding mode.

Intel ARCHITECTURE IA-32 Specifications

General

Instruction Set	x86
Instruction Set Type	CISC
Memory Segmentation	Supported
Operating Modes	Real mode, Protected mode, Virtual 8086 mode
Max Physical Address Size	36 bits (with PAE)
Max Virtual Address Size	32 bits
Architecture	IA-32 (Intel Architecture 32-bit)
Addressable Memory	4 GB (with Physical Address Extension up to 64 GB)
Floating Point Registers	8 x 80-bit
MMX Registers	8 x 64-bit
SSE Registers	8 x 128-bit
Registers	General-purpose registers (EAX, EBX, ECX, EDX, ESI, EDI, ESP, EBP), Segment registers (CS, DS, SS, ES, FS, GS), Instruction pointer (EIP), Flags register (EFLAGS)
Floating Point Unit	Yes (x87)