Intel ARCHITECTURE IA-32 User Manual

IA-32 Intel® Architecture Optimization
4-4
Using emms clears all of the valid bits, effectively emptying the x87
floating-point stack and making it ready for new x87 floating-point
operations. The
emms instruction ensures a clean transition between
using operations on the MMX registers and using operations on the x87
floating-point stack. On the Pentium 4 processor, there is a finite
overhead for using the
emms instruction.
Failure to use the
emms instruction (or the _mm_empty() intrinsic)
between operations on the MMX registers and operations on the x87
floating-point registers may lead to unexpected results.
Guidelines for Using EMMS Instruction
When developing code with both x87 floating-point and 64-bit SIMD
integer instructions, follow these steps:
1. Always call the
emms instruction at the end of 64-bit SIMD integer
code when the code transitions to x87 floating-point code.
2. Insert the
emms instruction at the end of all 64-bit SIMD integer
code segments to avoid an x87 floating-point stack overflow
exception when an x87 floating-point instruction is executed.
When writing an application that uses both floating-point and 64-bit
SIMD integer instructions, use the following guidelines to help you
determine when to use
emms:
• If next instruction is x87 FP: Use _mm_empty() after a 64-bit SIMD
integer instruction if the next instruction is an
x87 FP instruction;
for example, before doing calculations on floats, doubles or long
doubles.
CAUTION. Failure to reset the tag word for FP
instructions after using an MMX instruction can result
in faulty execution or poor performance.

Intel ARCHITECTURE IA-32 Specifications

General

Instruction Set	x86
Instruction Set Type	CISC
Memory Segmentation	Supported
Operating Modes	Real mode, Protected mode, Virtual 8086 mode
Max Physical Address Size	36 bits (with PAE)
Max Virtual Address Size	32 bits
Architecture	IA-32 (Intel Architecture 32-bit)
Addressable Memory	4 GB (with Physical Address Extension up to 64 GB)
Floating Point Registers	8 x 80-bit
MMX Registers	8 x 64-bit
SSE Registers	8 x 128-bit
Registers	General-purpose registers (EAX, EBX, ECX, EDX, ESI, EDI, ESP, EBP), Segment registers (CS, DS, SS, ES, FS, GS), Instruction pointer (EIP), Flags register (EFLAGS)
Floating Point Unit	Yes (x87)