Intel ARCHITECTURE IA-32 User Manual

Application Performance Tools A
A-3
family. Vectorization, processor dispatch, inter-procedural optimization,
profile-guided optimization and OpenMP parallelism are all supported
by the Intel compilers and can significantly aid the performance of an
application.
The most general optimization options are
-O1, -02 and -O3. Each of
them enables a number of specific optimization options. In most cases,
-O2 is recommended over -O1 because the -O2 option enables function
expansion, which helps programs that have many calls to small
functions. The
-01 may sometimes be preferred when code size is a
concern. The
-O2 option is on by default.
The
-Od (-O0 on Linux) option disables all optimizations. The -03
option enables more aggressive loop optimizations, most of which are
effective only in conjunction with processor-specific optimizations
described below.
All the command-line options are described in the Intel® C++
Compiler User’s Guide. Further advice on optimizing applications with
the Intel compiler can be found in “Optimizing Applications with the
Intel® C++ and Fortran Compilers for Windows* and Linux*”
available at http://www.intel.com/software/products/compilers
.
Code Optimization Options
This section describes specific options that may be used to optimize
your code and improve the performance of your application.
Targeting a Processor (-Gn)
Use -Gn to target an application to run on a specific processor for
maximum performance. Any of the
-Gn suboptions you choose results
in your binary being optimized for corresponding Intel architecture
32-bit processors.
-G6 (-tpp6 on Linux) targets optimization for the
Pentium II and Pentium III processors.
-G7 (-tpp7 on Linux) is the

Intel ARCHITECTURE IA-32 Specifications

General

Instruction Set	x86
Instruction Set Type	CISC
Memory Segmentation	Supported
Operating Modes	Real mode, Protected mode, Virtual 8086 mode
Max Physical Address Size	36 bits (with PAE)
Max Virtual Address Size	32 bits
Architecture	IA-32 (Intel Architecture 32-bit)
Addressable Memory	4 GB (with Physical Address Extension up to 64 GB)
Floating Point Registers	8 x 80-bit
MMX Registers	8 x 64-bit
SSE Registers	8 x 128-bit
Registers	General-purpose registers (EAX, EBX, ECX, EDX, ESI, EDI, ESP, EBP), Segment registers (CS, DS, SS, ES, FS, GS), Instruction pointer (EIP), Flags register (EFLAGS)
Floating Point Unit	Yes (x87)