Optimizing Cache Usage 6
6-13
possible. This behavior should be considered reserved, and dependence
on the behavior of any particular implementation risks future
incompatibility.
Streaming Store Usage Models
The two primary usage domains for streaming store are coherent
requests and non-coherent requests.
Coherent Requests
Coherent requests are normal loads and stores to system memory, which
may also hit cache lines present in another processor in a
multi-processor environment. With coherent requests, a streaming store
can be used in the same way as a regular store that has been mapped
with a
WC memory type (PAT or MTRR). An sfence instruction must be
used within a producer-consumer usage model in order to ensure
coherency and visibility of data between processors.
Within a single-processor system, the CPU can also re-read the same
memory location and be assured of coherence (that is, a single,
consistent view of this memory location): the same is true for a
multi-processor (MP) system, assuming an accepted MP software
producer-consumer synchronization policy is employed.
Non-coherent requests
Non-coherent requests arise from an I/O device, such as an AGP
graphics card, that reads or writes system memory using non-coherent
requests, which are not reflected on the processor bus and thus will not
query the processor’s caches. An
sfence instruction must be used
within a producer-consumer usage model in order to ensure coherency
and visibility of data between processors. In this case, if the processor is
writing data to the I/O device, a streaming store can be used with a
processor with any behavior of approach (a), page 11, above, only if the
region has also been mapped with a
WC memory type (PAT, MTRR).
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