Intel ARCHITECTURE IA-32 User Manual

Multi-Core and Hyper-Threading Technology 7
7-21
the white paper “Developing Multi-threaded Applications: A
Platform Consistent Approach” (referenced in the Introduction
chapter).
• When choosing between different primitives to implement a
synchronization construct, using Intel Thread Checker and Thread
Profiler can be very useful in dealing with multi-threading
functional correctness issue and performance impact under
multi-threaded execution. Additional information on the capabilities
of Intel Thread Checker and Thread Profiler are described in
Appendix A.
Table 7-1 is useful for comparing the properties of three categories of
synchronization objects available to multi-threaded applications.
Table 7-1 Properties of Synchronization Objects
Characteristics
Operating System
Synchronization
Objects
Light Weight User Syn-
chronization
Synchronization
Object based on MON-
ITOR/MWAIT
Cycles to
acquire and
release (if there
is a contention)
Thousands or Tens
of thousands cycles
Hundreds of cycles Hundreds of cycles
Power
consumption
Saves power by
halting the core or
logical processor if
idle
Some power saving if
using PAUSE
Saves more power
than PAUSE
Scheduling and
context
switching
Returns to the OS
scheduler if
contention exists
(can be tuned with
earlier spin loop
count)
Does not return to the
OS scheduler
voluntarily
Does not return to the
OS scheduler
voluntarily
Ring level Ring 0 Ring 3 Ring 0

Intel ARCHITECTURE IA-32 Specifications

General

Instruction Set	x86
Instruction Set Type	CISC
Memory Segmentation	Supported
Operating Modes	Real mode, Protected mode, Virtual 8086 mode
Max Physical Address Size	36 bits (with PAE)
Max Virtual Address Size	32 bits
Architecture	IA-32 (Intel Architecture 32-bit)
Addressable Memory	4 GB (with Physical Address Extension up to 64 GB)
Floating Point Registers	8 x 80-bit
MMX Registers	8 x 64-bit
SSE Registers	8 x 128-bit
Registers	General-purpose registers (EAX, EBX, ECX, EDX, ESI, EDI, ESP, EBP), Segment registers (CS, DS, SS, ES, FS, GS), Instruction pointer (EIP), Flags register (EFLAGS)
Floating Point Unit	Yes (x87)