Intel ARCHITECTURE IA-32 User Manual

B-1
B
Using Performance Monitoring
Events
Performance monitoring events provides facilities to characterize the
interaction between programmed sequences of instructions and different
microarchitectural sub-systems. Performance monitoring events are
described in Chapter 18 and Appendix A of the IA-32 Intel®
Architecture Software Developer’s Manual, Volume 3B.
The first part of this chapter provides information on how to use
performance events specific to Pentium 4 and Intel Xeon processors
based on the Intel NetBurst microarchitecture. The second half
discusses similar topics using performance events available on Intel
Core Solo and Intel Core Duo processors.
Pentium 4 Processor Performance Metrics
The descriptions of the Intel Pentium 4 processor performance metrics
use terminology that are specific to the Intel NetBurst microarchitecture
and to the implementation in the Pentium 4 and Intel Xeon processors.
The following sections explain the terminology specific to Pentium 4
and Intel Xeon processors, usage notes that apply to counting clock
cycles, and notes for using some of the performance metrics dealing
with bus, memory and Hyper-Threading Technology. The performance
metrics for IA-32 processors with CPUID signature that matches family
encoding 15, mode encoding 0, 1, 2 or 3 are listed in Tables B-1 through
Table B-4. Several new performance metrics are available to IA-32
processors with CPUID signature that matches family encoding 15,
mode encoding 3; these performance metrics are listed in Table B-5.

Intel ARCHITECTURE IA-32 Specifications

General

Instruction Set	x86
Instruction Set Type	CISC
Memory Segmentation	Supported
Operating Modes	Real mode, Protected mode, Virtual 8086 mode
Max Physical Address Size	36 bits (with PAE)
Max Virtual Address Size	32 bits
Architecture	IA-32 (Intel Architecture 32-bit)
Addressable Memory	4 GB (with Physical Address Extension up to 64 GB)
Floating Point Registers	8 x 80-bit
MMX Registers	8 x 64-bit
SSE Registers	8 x 128-bit
Registers	General-purpose registers (EAX, EBX, ECX, EDX, ESI, EDI, ESP, EBP), Segment registers (CS, DS, SS, ES, FS, GS), Instruction pointer (EIP), Flags register (EFLAGS)
Floating Point Unit	Yes (x87)