Intel ARCHITECTURE IA-32 User Manual

IA-32 Intel® Architecture Optimization
A-2
• Intel Performance Libraries
The Intel Performance Library family consists of a set of software
libraries optimized for Intel architecture processors. The library
family includes the following:
—Intel
®
Math Kernel Library (MKL)
—Intel
®
Integrated Performance Primitives (IPP)
• Intel Threading Tools. The Intel Threading Tools consist of the
following:
— Intel Thread Checker
— Thread Profiler
Intel
®
Compilers
1
Intel C++ compilers can deliver significant application performance
improvements for Microsoft Windows as well as Linux operating
system environments. In the Windows environment, the Intel C++
compiler is source and binary compatible with Microsoft Visual C++*
and plugs into the Microsoft .NET IDE. The Intel Visual Fortran
Compiler is source compatible with Compaq* Visual Fortran, and also
plugs into the Microsoft .NET IDE. In Linux environment, the Intel
C++ Compilers are binary compatible with the corresponding version of
gcc. The Intel C++ compiler may be used from the Borland* IDE, or
standalone, like the Fortran compiler.
All compilers allow you to optimize your code by using special
optimization options described in this section. There are several coding
methods and optimizations, described here and in other sections of this
manual, targeted specifically for enabling software developers to
optimize applications for the Pentium 4 and Intel Xeon processor
1. The compiler options shown in this section use syntax specific to the Microsoft
Windows-based compiler. Equivalent options, which may have slightly different syntax,
exist for the Linux-based compiler. See your compiler documentation for a complete listing
and description of the various options available.

Intel ARCHITECTURE IA-32 Specifications

General

Instruction Set	x86
Instruction Set Type	CISC
Memory Segmentation	Supported
Operating Modes	Real mode, Protected mode, Virtual 8086 mode
Max Physical Address Size	36 bits (with PAE)
Max Virtual Address Size	32 bits
Architecture	IA-32 (Intel Architecture 32-bit)
Addressable Memory	4 GB (with Physical Address Extension up to 64 GB)
Floating Point Registers	8 x 80-bit
MMX Registers	8 x 64-bit
SSE Registers	8 x 128-bit
Registers	General-purpose registers (EAX, EBX, ECX, EDX, ESI, EDI, ESP, EBP), Segment registers (CS, DS, SS, ES, FS, GS), Instruction pointer (EIP), Flags register (EFLAGS)
Floating Point Unit	Yes (x87)