Intel ARCHITECTURE IA-32 User Manual

IA-32 Intel® Architecture Optimization
3-4
To find out whether the operating system supports SSE, execute an SSE
instruction and trap for an exception if one occurs. Catching the
exception in a simple try/except clause (using structured exception
handling in C++) and checking whether the exception code is an invalid
opcode will give you the answer. See Example 3-3.
Example 3-2 Identification of SSE with cpuid
…identify existence of cpuid instruction
… ; identify signature is genuine intel
mov eax, 1 ; request for feature flags
cpuid ; 0Fh, 0A2h cpuid instruction
test EDX, 002000000h ; bit 25 in feature flags equal to 1
jnz Found
Example 3-3 Identification of SSE by the OS
bool OSSupportCheck() {
_try {
__asm xorps xmm0, xmm0 ;Streaming SIMD Extension
}
_except(EXCEPTION_EXECUTE_HANDLER) {
if (_exception_code()==STATUS_ILLEGAL_INSTRUCTION)
/* SSE not supported */
return (false);
}
/* SSE are supported by OS */
return (true);
}

Intel ARCHITECTURE IA-32 Specifications

General

Instruction Set	x86
Instruction Set Type	CISC
Memory Segmentation	Supported
Operating Modes	Real mode, Protected mode, Virtual 8086 mode
Max Physical Address Size	36 bits (with PAE)
Max Virtual Address Size	32 bits
Architecture	IA-32 (Intel Architecture 32-bit)
Addressable Memory	4 GB (with Physical Address Extension up to 64 GB)
Floating Point Registers	8 x 80-bit
MMX Registers	8 x 64-bit
SSE Registers	8 x 128-bit
Registers	General-purpose registers (EAX, EBX, ECX, EDX, ESI, EDI, ESP, EBP), Segment registers (CS, DS, SS, ES, FS, GS), Instruction pointer (EIP), Flags register (EFLAGS)
Floating Point Unit	Yes (x87)