Intel ARCHITECTURE IA-32 User Manual

IA-32 Intel® Architecture Optimization
4-26
Clipping to an Arbitrary Range [high, low]
This section explains how to clip a values to a range [high, low].
Specifically, if the value is less than
low or greater than high, then clip
to
low or high, respectively. This technique uses the packed-add and
packed-subtract instructions with saturation (signed or unsigned), which
means that this technique can only be used on packed-byte and
packed-word data types.
The examples in this section use the constants
packed_max and
packed_min and show operations on word values. For simplicity we use
the following constants (corresponding constants are used in case the
operation is done on byte values):
• packed_max equals 0x7fff7fff7fff7fff
• packed_min equals 0x8000800080008000
• packed_low contains the value low in all four words of the
packed-words data type
• packed_high contains the value high in all four words of the
packed-words data type
• packed_usmax all values equal 1
•
high_us adds the high value to all data elements (4 words) of
packed_min
• low_us adds the low value to all data elements (4 words) of
packed_min
CAUTION. The absolute value of the most negative
number (that is, 8000 hex for 16-bit) cannot be
represented using positive numbers. This algorithm
will return the original value for the absolute value
(8000 hex).

Intel ARCHITECTURE IA-32 Specifications

General

Instruction Set	x86
Instruction Set Type	CISC
Memory Segmentation	Supported
Operating Modes	Real mode, Protected mode, Virtual 8086 mode
Max Physical Address Size	36 bits (with PAE)
Max Virtual Address Size	32 bits
Architecture	IA-32 (Intel Architecture 32-bit)
Addressable Memory	4 GB (with Physical Address Extension up to 64 GB)
Floating Point Registers	8 x 80-bit
MMX Registers	8 x 64-bit
SSE Registers	8 x 128-bit
Registers	General-purpose registers (EAX, EBX, ECX, EDX, ESI, EDI, ESP, EBP), Segment registers (CS, DS, SS, ES, FS, GS), Instruction pointer (EIP), Flags register (EFLAGS)
Floating Point Unit	Yes (x87)