Intel ARCHITECTURE IA-32 User Manual

IA-32 Intel® Architecture Optimization
3-12
costly application processing time. However, these routines have
potential for increased performance when you convert them to use one
of the SIMD technologies.
Once you identify your opportunities for using a SIMD technology, you
must evaluate what should be done to determine whether the current
algorithm or a modified one will ensure the best performance.
Coding Techniques
The SIMD features of SSE3, SSE2, SSE, and MMX technology require
new methods of coding algorithms. One of them is vectorization.
Vectorization is the process of transforming sequentially-executing, or
scalar, code into code that can execute in parallel, taking advantage of the
SIMD architecture parallelism.
This section discusses the coding
techniques available for an application to make use of the SIMD
architecture.
To vectorize your code and thus take advantage of the SIMD
architecture, do the following:
• Determine if the memory accesses have dependencies that would
prevent parallel execution.
• “Strip-mine” the inner loop to reduce the iteration count by the
length of the SIMD operations (for example, four for
single-precision floating-point SIMD, eight for 16-bit integer SIMD
on the XMM registers).
• Re-code the loop with the SIMD instructions.
Each of these actions is discussed in detail in the subsequent sections of
this chapter. These sections also discuss enabling automatic
vectorization via the Intel C++ Compiler.

Intel ARCHITECTURE IA-32 Specifications

General

Instruction Set	x86
Instruction Set Type	CISC
Memory Segmentation	Supported
Operating Modes	Real mode, Protected mode, Virtual 8086 mode
Max Physical Address Size	36 bits (with PAE)
Max Virtual Address Size	32 bits
Architecture	IA-32 (Intel Architecture 32-bit)
Addressable Memory	4 GB (with Physical Address Extension up to 64 GB)
Floating Point Registers	8 x 80-bit
MMX Registers	8 x 64-bit
SSE Registers	8 x 128-bit
Registers	General-purpose registers (EAX, EBX, ECX, EDX, ESI, EDI, ESP, EBP), Segment registers (CS, DS, SS, ES, FS, GS), Instruction pointer (EIP), Flags register (EFLAGS)
Floating Point Unit	Yes (x87)