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Intel ARCHITECTURE IA-32 User Manual

Intel ARCHITECTURE IA-32
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9-1
9
Power Optimization for
Mobile Usages
Overview
Mobile computing allows computers to operate anywhere, anytime.
Battery life is a key factor in delivering this benefit. Mobile applications
require software optimization that considers both performance and
power consumption. This chapter provides background on power saving
techniques in mobile processors
1
and makes recommendations that
developers can leverage to provide longer battery life.
A microprocessor consumes power while actively executing
instructions and doing useful work. It also consumes power in inactive
states (when halted). When a processor is active, its power consumption
is referred to as active power. When a processor is halted, its power
consumption is referred to as static power.
ACPI 3.0 (ACPI stands for Advanced Configuration and Power
Interface) provides a standard that enables intelligent power
management and consumption. It does this by allowing devices to be
turned on when they are needed and by allowing control of processor
speed (depending on application requirements). The standard defines a
number of P-states to facilitate management of active power
consumption; and several C-state types
2
to facilitate management of
static power consumption.
1. Power saving techniques applicable to mobile platforms, such as Intel Centrino mobile
technology or Intel Centrino Duo mobile technology, have rich subjects; only
processor-related techniques are covered in this manual.
2. ACPI 3.0 specification defines four C-state types, commonly known as C0, C1, C2, C3.
Microprocessors supporting ACPI standard can implement processor-specific states that
map to each ACPI C-state type.

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Intel ARCHITECTURE IA-32 Specifications

General IconGeneral
Instruction Setx86
Instruction Set TypeCISC
Memory SegmentationSupported
Operating ModesReal mode, Protected mode, Virtual 8086 mode
Max Physical Address Size36 bits (with PAE)
Max Virtual Address Size32 bits
ArchitectureIA-32 (Intel Architecture 32-bit)
Addressable Memory4 GB (with Physical Address Extension up to 64 GB)
Floating Point Registers8 x 80-bit
MMX Registers8 x 64-bit
SSE Registers8 x 128-bit
RegistersGeneral-purpose registers (EAX, EBX, ECX, EDX, ESI, EDI, ESP, EBP), Segment registers (CS, DS, SS, ES, FS, GS), Instruction pointer (EIP), Flags register (EFLAGS)
Floating Point UnitYes (x87)

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