Intel ARCHITECTURE IA-32 - Packed Shuffle Word for 128-bit Registers

Optimizing for SIMD Integer Applications 4
4-19
Packed Shuffle Word for 128-bit Registers
The pshuflw/pshufhw instruction performs a full shuffle of any source
word field within the low/high 64 bits to any result word field in the
low/high 64 bits, using an 8-bit immediate operand; the other high/low
64 bits are passed through from the source operand.
The
pshufd instruction performs a full shuffle of any double-word field
within the 128-bit source to any double-word field in the 128-bit result,
using an 8-bit immediate operand.
No more than 3 instructions, using
pshuflw/pshufhw/pshufd, are
required to implement some common data shuffling operations.
Broadcast, Swap, and Reverse are illustrated in Example 4-12,
Example 4-13, and Example 4-14, respectively.
Example 4-11 pshuf Instruction Code
; Input:
; edi source value
; Output:
; MM1 MM register containing re-arranged words
movq mm0, [edi]
pshufw mm1, mm0, 0x1b
Example 4-12 Broadcast Using 2 Instructions
/* Goal: Broadcast the value from word 5 to all words */
/* Instruction Result */
| 7| 6| 5| 4| 3| 2| 1| 0|
PSHUFHW (3,2,1,1)| 7| 6| 5| 5| 3| 2| 1| 0|
PSHUFD (2,2,2,2)| 5| 5| 5| 5| 5| 5| 5| 5|