Intel ARCHITECTURE IA-32 User Manual

Optimizing for SIMD Integer Applications 4
4-27
Highly Efficient Clipping
For clipping signed words to an arbitrary range, the pmaxsw and pminsw
instructions may be used. For clipping unsigned bytes to an arbitrary
range, the
pmaxub and pminub instructions may be used. Example 4-19
shows how to clip signed words to an arbitrary range; the code for
clipping unsigned bytes is similar.
Example 4-19 Clipping to a Signed Range of Words [high, low]
; Input:
; MM0 signed source operands
; Output:
; MM0 signed words clipped to the signed
; range [high, low]
pminsw MM0, packed_high
pmaxsw MM0, packed_low
Example 4-20 Clipping to an Arbitrary Signed Range [high, low]
; Input:
; MM0 signed source operands
; Output:
; MM1 signed operands clipped to the unsigned
; range [high, low]
paddw MM0, packed_min ; add with no saturation
; 0x8000 to convert to unsigned
paddusw MM0, (packed_usmax - high_us)
; in effect this clips to high
psubusw MM0, (packed_usmax - high_us + low_us)
; in effect this clips to low
paddw MM0, packed_low ; undo the previous two offsets

Intel ARCHITECTURE IA-32 Specifications

General

Instruction Set	x86
Instruction Set Type	CISC
Memory Segmentation	Supported
Operating Modes	Real mode, Protected mode, Virtual 8086 mode
Max Physical Address Size	36 bits (with PAE)
Max Virtual Address Size	32 bits
Architecture	IA-32 (Intel Architecture 32-bit)
Addressable Memory	4 GB (with Physical Address Extension up to 64 GB)
Floating Point Registers	8 x 80-bit
MMX Registers	8 x 64-bit
SSE Registers	8 x 128-bit
Registers	General-purpose registers (EAX, EBX, ECX, EDX, ESI, EDI, ESP, EBP), Segment registers (CS, DS, SS, ES, FS, GS), Instruction pointer (EIP), Flags register (EFLAGS)
Floating Point Unit	Yes (x87)