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Intel ARCHITECTURE IA-32 - Figure B-1 Relationships between the Cache Hierarchy, IOQ, BSQ and Front Side Bus

Intel ARCHITECTURE IA-32
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IA-32 IntelĀ® Architecture Optimization
B-10
Figure B-1 Relationships Between the Cache Hierarchy, IOQ, BSQ and Front
Side Bus
Chip SetSystem Memory
1st Level Data
Cache
3rd Level Cache
FSB_ IOQ
BSQ
Unified 2nd Level
Cache
1st Level Data
Cache
3rd Level Cache
FSB_ IOQ
BSQ
Unified 2nd Level
Cache

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