Intel ARCHITECTURE IA-32 User Manual

IA-32 Intel® Architecture Optimization
A-8
When you use PGO, consider the following guidelines:
• Minimize the changes to your program after instrumented execution
and before feedback compilation. During feedback compilation, the
compiler ignores dynamic information for functions modified after
that information was generated.
• Repeat the instrumentation compilation if you make many changes
to your source files after execution and before feedback
compilation.
For further details on the interprocedural and profile-guided
optimizations, refer to the Intel C++ Compiler User’s Guide.
Intel
®
VTune™ Performance Analyzer
The Intel VTune Performance Analyzer is a powerful software-profiling
tool for Microsoft Windows and Linux. The VTune analyzer helps you
understand the performance characteristics of your software at all
levels: the system, application, microarchitecture.
The sections that follow describe the major features of the VTune
analyzer and briefly explain how to use them. For more details on these
features, run the VTune analyzer and see the online help or the built in
Getting Started Guide.
All these features are available for Microsoft Windows. On Linux,
sampling and call graph are available.
NOTE. The compiler issues a warning that the
dynamic information corresponds to a modified
function.

Intel ARCHITECTURE IA-32 Specifications

General

Instruction Set	x86
Instruction Set Type	CISC
Memory Segmentation	Supported
Operating Modes	Real mode, Protected mode, Virtual 8086 mode
Max Physical Address Size	36 bits (with PAE)
Max Virtual Address Size	32 bits
Architecture	IA-32 (Intel Architecture 32-bit)
Addressable Memory	4 GB (with Physical Address Extension up to 64 GB)
Floating Point Registers	8 x 80-bit
MMX Registers	8 x 64-bit
SSE Registers	8 x 128-bit
Registers	General-purpose registers (EAX, EBX, ECX, EDX, ESI, EDI, ESP, EBP), Segment registers (CS, DS, SS, ES, FS, GS), Instruction pointer (EIP), Flags register (EFLAGS)
Floating Point Unit	Yes (x87)