Intel ARCHITECTURE IA-32 User Manual

D-1
D
Stack Alignment
This appendix details on the alignment of the stacks of data for
Streaming SIMD Extensions and Streaming SIMD Extensions 2.
Stack Frames
This section describes the stack alignment conventions for both
esp-based (normal), and ebp-based (debug) stack frames. A stack frame
is a contiguous block of memory allocated to a function for its local
memory needs. It contains space for the function’s parameters, return
address, local variables, register spills, parameters needing to be passed
to other functions that a stack frame may call, and possibly others. It is
typically delineated in memory by a stack frame pointer (
esp) that
points to the base of the frame for the function and from which all data
are referenced via appropriate offsets. The convention on IA-32 is to use
the
esp register as the stack frame pointer for normal optimized code,
and to use
ebp in place of esp when debug information must be kept.
Debuggers use the
ebp register to find the information about the
function via the stack frame.
It is important to ensure that the stack frame is aligned to a 16-byte
boundary upon function entry to keep local
__m128 data, parameters,
and
xmm register spill locations aligned throughout a function
invocation.The Intel C++ Compiler for Win32* Systems supports
conventions presented here help to prevent memory references from
incurring penalties due to misaligned data by keeping them aligned to
16-byte boundaries. In addition, this scheme supports improved

Intel ARCHITECTURE IA-32 Specifications

General

Instruction Set	x86
Instruction Set Type	CISC
Memory Segmentation	Supported
Operating Modes	Real mode, Protected mode, Virtual 8086 mode
Max Physical Address Size	36 bits (with PAE)
Max Virtual Address Size	32 bits
Architecture	IA-32 (Intel Architecture 32-bit)
Addressable Memory	4 GB (with Physical Address Extension up to 64 GB)
Floating Point Registers	8 x 80-bit
MMX Registers	8 x 64-bit
SSE Registers	8 x 128-bit
Registers	General-purpose registers (EAX, EBX, ECX, EDX, ESI, EDI, ESP, EBP), Segment registers (CS, DS, SS, ES, FS, GS), Instruction pointer (EIP), Flags register (EFLAGS)
Floating Point Unit	Yes (x87)