EasyManuals Logo

Intel ARCHITECTURE IA-32 User Manual

Intel ARCHITECTURE IA-32
568 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #441 background imageLoading...
Page #441 background image
Application Performance Tools A
A-7
The -Qrcd option disables the change to truncation of the rounding
mode in floating-point-to-integer conversions.
For complete details on all of the code optimization options, refer to the
Intel® C++ Compiler Users Guide.
Interprocedural and Profile-Guided Optimizations
The following are two methods to improve the performance of your
code based on its unique profile and procedural dependencies:
Interprocedural Optimization (IPO)
Use the -Qip option to analyze your code and apply optimizations
between procedures within each source file. Use multifile IPO with
-Qipo to enable the optimizations between procedures in separate
source files.
Profile-Guided Optimization (PGO)
Creates an instrumented program from your source code and special
code from the compiler. Each time this instrumented code is executed,
the compiler generates a dynamic information file. When you compile a
second time, the dynamic information files are merged into a summary
file. Using the profile information in this file, the compiler attempts to
optimize the execution of the most heavily travelled paths in the
program.
Profile-guided optimization is particularly beneficial for the Pentium 4
and Intel Xeon processor family. It greatly enhances the optimization
decisions the compiler makes regarding instruction cache utilization and
memory paging. Also, because PGO uses execution-time information to
guide the optimizations, branch-prediction can be significantly
enhanced by reordering branches and basic blocks to keep the most
commonly used paths in the microarchitecture pipeline, as well as
generating the appropriate branch-hints for the processor.

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Intel ARCHITECTURE IA-32 and is the answer not in the manual?

Intel ARCHITECTURE IA-32 Specifications

General IconGeneral
Instruction Setx86
Instruction Set TypeCISC
Memory SegmentationSupported
Operating ModesReal mode, Protected mode, Virtual 8086 mode
Max Physical Address Size36 bits (with PAE)
Max Virtual Address Size32 bits
ArchitectureIA-32 (Intel Architecture 32-bit)
Addressable Memory4 GB (with Physical Address Extension up to 64 GB)
Floating Point Registers8 x 80-bit
MMX Registers8 x 64-bit
SSE Registers8 x 128-bit
RegistersGeneral-purpose registers (EAX, EBX, ECX, EDX, ESI, EDI, ESP, EBP), Segment registers (CS, DS, SS, ES, FS, GS), Instruction pointer (EIP), Flags register (EFLAGS)
Floating Point UnitYes (x87)

Related product manuals