Optimizing for SIMD Floating-point Applications 5
5-13
Although the generated result of all zeros does not depend on the
specific data contained in the source operand (that is,
XOR of a register
with itself always produces all zeros), the instruction cannot execute
until the instruction that generates
xmm0 has completed. In the worst
case, this creates a dependence chain that links successive iterations of
the loop, even if those iterations are otherwise independent. The
performance impact can be significant depending on how many other
independent intra-loop computations are performed. Note that on the
Pentium 4 processor, the SIMD integer
pxor instructions, if used with
the same register, do break the dependence chain, eliminating false
dependencies when clearing registers.
The same situation can occur for the above
movhps/movlps/shufps
sequence. Since each
movhps/movlps instruction bypasses part of the
destination register, the instruction cannot execute until the prior
instruction that generates this register has completed. As with the
xorps
example, in the worst case this dependence can prevent successive loop
iterations from executing in parallel.
A solution is to include a 128-bit load (that is, from a dummy local
variable, such as
tmp in Example 5-4) to each register to be used with a
movhps/movlps instruction. This action effectively breaks the
dependence by performing an independent load from a memory or
cached location.
CAUTION. Avoid creating a dependence chain from
previous computations because the
movhps/movlps
instructions bypass one part of the register. The same
issue can occur with the use of an exclusive-OR
function within an inner loop in order to clear a
register:
xorps xmm0, xmm0 ; All 0’s written to xmm0
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