ST STM32F40 Series User Manual

RM0090 USB on-the-go high-speed (OTG_HS)
Doc ID 018909 Rev 4 1182/1422
OTG_HS_DIEPEMPMSK 0x834
OTG_HS device IN endpoint FIFO empty interrupt mask register:
(OTG_HS_DIEPEMPMSK) on page 1230
OTG_HS_EACHHINT 0x838
OTG_HS device each endpoint interrupt register
(OTG_HS_DEACHINT) on page 1230
OTG_HS_EACHHINTMSK 0x83C
OTG_HS device each endpoint interrupt register mask
(OTG_HS_DEACHINTMSK) on page 1231
OTG_HS_DIEPEACHMSK1 0x844
OTG_HS device each in endpoint-1 interrupt register
(OTG_HS_DIEPEACHMSK1) on page 1231
OTG_HS_DOEPEACHMSK1 0x884
OTG_HS device each OUT endpoint-1 interrupt register
(OTG_HS_DOEPEACHMSK1) on page 1232
OTG_HS_DIEPCTLx
0x920
0x940
...
0xAE0
OTG device endpoint-x control register (OTG_HS_DIEPCTLx) (x =
0..7, where x = Endpoint_number) on page 1233
OTG_HS_DIEPINTx 0x908
OTG_HS device endpoint-x interrupt register
(OTG_HS_DIEPINTx) (x = 0..7, where x = Endpoint_number) on
page 1240
OTG_HS_DIEPTSIZ0 0x910
OTG_HS device IN endpoint 0 transfer size register
(OTG_HS_DIEPTSIZ0) on page 1243
OTG_HS_DIEPDMAx 0x914
OTG_HS device endpoint-x DMA address register
(OTG_HS_DIEPDMAx / OTG_HS_DOEPDMAx) (x = 1..5, where
x = Endpoint_number) on page 1247
OTG_HS_DTXFSTSx 0x918
OTG_HS device IN endpoint transmit FIFO status register
(OTG_HS_DTXFSTSx) (x = 0..5, where x = Endpoint_number) on
page 1246
OTG_HS_DIEPTSIZx
0x930
0x950
...
0xAF0
OTG_HS device endpoint-x transfer size register
(OTG_HS_DOEPTSIZx) (x = 1..5, where x = Endpoint_number)
on page 1246
OTG_HS_DOEPCTL0 0xB00
OTG_HS device control OUT endpoint 0 control register
(OTG_HS_DOEPCTL0) on page 1236
OTG_HS_DOEPCTLx
0xB20
0xB40
...
0xCC0
0xCE0
0xCFD
OTG device endpoint-x control register (OTG_HS_DIEPCTLx) (x =
0..7, where x = Endpoint_number) on page 1233
Table 180. Device-mode control and status registers (continued)
Acronym
Offset
address
Register name

ST STM32F40 Series Specifications

General

Brand	ST
Model	STM32F40 Series
Category	Microcontrollers
Language	English