MPC5604B/C Microcontroller Reference Manual, Rev. 8
162 Freescale Semiconductor
8.3.1.19 Peripheral Status Register 3 (ME_PS3)
This register provides the status of the peripherals. Please refer to Table 8-12 for details.
8.3.1.20 Run Peripheral Configuration Registers (ME_RUN_PC0…7)
These registers configure eight different types of peripheral behavior during run modes.
Address 0xC3FD_C06C Access: Supervisor read
0123456789101112131415
R0000000000000000
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
0000000
S_CMU
00000000
W
Reset0000000000000000
Figure 8-20. Peripheral Status Register 3 (ME_PS3)
Table 8-12. Peripheral Status Registers 0…4 (ME_PS0…4) Field Descriptions
Field Description
S_<periph> Peripheral status — These bits specify the current status of the peripherals in the system. If no peripheral is
mapped on a particular position, the corresponding bit is always read as ‘0’.
0 Peripheral is frozen
1 Peripheral is active
Address 0xC3FD_C080 - 0xC3FD_C09C Access: Supervisor read/write
0123456789101112131415
R0000000000000000
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
00000000
RUN3
RUN2
RUN1
RUN0
DRUN
SAFE
TEST
RESET
W
Reset0000000000000000
Figure 8-21. Run Peripheral Configuration Registers (ME_RUN_PC0…7)
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