Freescale Semiconductor MPC5604B - 2. INTC configuration (Software mode)

MPC5604B/C Microcontroller Reference Manual, Rev. 8
12 Freescale Semiconductor
23.5.6 DSPI Interrupt Request Enable Register (DSPIx_RSER) ............................................488
23.5.7 DSPI PUSH TX FIFO Register (DSPIx_PUSHR) .......................................................490
23.5.8 DSPI POP RX FIFO Register (DSPIx_POPR) ............................................................492
23.5.9 DSPI Transmit FIFO Registers 0–3 (DSPIx_TXFRn) .................................................493
23.6 Functional description ...................................................................................................................494
23.6.1 Modes of operation .......................................................................................................495
23.6.2 Start and stop of DSPI transfers ...................................................................................496
23.6.3 Serial peripheral interface (SPI) configuration .............................................................497
23.6.4 DSPI baud rate and clock delay generation ..................................................................500
23.6.5 Transfer formats ...........................................................................................................503
23.6.6 Continuous serial communications clock .....................................................................511
23.6.7 Interrupt requests ..........................................................................................................514
23.6.8 Power saving features ...................................................................................................515
23.7 Initialization and application information .....................................................................................516
23.7.1 How to change queues ..................................................................................................516
23.7.2 Baud rate settings .........................................................................................................516
23.7.3 Delay settings ...............................................................................................................518
23.7.4 Calculation of FIFO pointer addresses .........................................................................518
Chapter 24
Timers
24.1 Introduction ...................................................................................................................................523
24.2 Technical overview ........................................................................................................................523
24.2.1 Overview of the STM ...................................................................................................525
24.2.2 Overview of the eMIOS ...............................................................................................525
24.2.3 Overview of the PIT .....................................................................................................527
24.3 System Timer Module (STM) .......................................................................................................527
24.3.1 Introduction ..................................................................................................................527
24.3.2 External signal description ...........................................................................................528
24.3.3 Memory map and register definition ............................................................................528
24.3.4 Functional description ..................................................................................................532
24.4 Enhanced Modular IO Subsystem (eMIOS) .................................................................................532
24.4.1 Introduction ..................................................................................................................532
24.4.2 External signal description ...........................................................................................535
24.4.3 Memory map and register description ..........................................................................535
24.4.4 Functional description ..................................................................................................547
24.4.5 Initialization/Application information ..........................................................................577
24.5 Periodic Interrupt Timer (PIT) ......................................................................................................580
24.5.1 Introduction ..................................................................................................................580
24.5.2 Features .........................................................................................................................581
24.5.3 Signal description .........................................................................................................581
24.5.4 Memory map and register description ..........................................................................581
24.5.5 Functional description ..................................................................................................586
24.5.6 Initialization and application information ....................................................................587