MPC5604B/C Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor 395
Table 21-11. UARTSR field descriptions
Field Description
SZF Stuck at Zero Flag
This bit is set by hardware when the bus is dominant for more than a 100-bit time. It is cleared by
software.
OCF OCF Output Compare Flag
0 No output compare event occurred.
1 The content of the counter has matched the content of OC1[0:7] or OC2[0:7] in LINOCR.
An interrupt is generated if the OCIE bit in LINIER register is set.
PE3 Parity Error Flag Rx3
This bit indicates if there is a parity error in the corresponding received byte (Rx3). See
Section 21.8.1.1, Buffer in UART mode. No interrupt is generated if this error occurs.
0 No parity error.
1 Parity error.
PE2 Parity Error Flag Rx2
This bit indicates if there is a parity error in the corresponding received byte (Rx2). See
Section 21.8.1.1, Buffer in UART mode. No interrupt is generated if this error occurs.
0 No parity error.
1 Parity error.
PE1 Parity Error Flag Rx1
This bit indicates if there is a parity error in the corresponding received byte (Rx1). See
Section 21.8.1.1, Buffer in UART mode. No interrupt is generated if this error occurs.
0 No parity error.
1 Parity error.
PE0 Parity Error Flag Rx0
This bit indicates if there is a parity error in the corresponding received byte (Rx0). See
Section 21.8.1.1, Buffer in UART mode. No interrupt is generated if this error occurs.
0 No parity error.
1 Parity error.
RMB Release Message Buffer
0 Buffer is free.
1 Buffer ready to be read by software. This bit must be cleared by software after reading data
received in the buffer.
This bit is cleared by hardware in Initialization mode.
FEF Framing Error Flag
This bit is set by hardware and indicates to the software that LINFlex has detected a framing error
(invalid stop bit).
BOF Buffer Overrun Flag
This bit is set by hardware when a new data byte is received and the buffer full flag is not cleared.
If RBLM in LINCR1 is set then the new byte received is discarded. If RBLM is reset then the new
byte overwrites buffer. it can be cleared by software.
RPS LIN Receive Pin State
This bit reflects the current status of LINRX pin for diagnostic purposes.
WUF Wake-up Flag
This bit is set by hardware and indicates to the software that LINFlex has detected a falling edge
on the LINRX pin in Sleep mode.
This bit must be cleared by software. It is reset by hardware in Initialization mode.
An interrupt i generated if WUIE bit in LINIER is set.
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