MPC5604B/C Microcontroller Reference Manual, Rev. 8
446 Freescale Semiconductor
BIT0_ERR Bit0 Error
This bit indicates when an inconsistency occurs between the transmitted and the received bit in a
message.
1 = At least one bit sent as dominant is received as recessive
0 = No such occurrence
ACK_ERR Acknowledge Error
This bit indicates that an Acknowledge Error has been detected by the transmitter node, i.e., a
dominant bit has not been detected during the ACK SLOT.
1 = An ACK error occurred since last read of this register
0 = No such occurrence
CRC_ERR Cyclic Redundancy Check Error
This bit indicates that a CRC Error has been detected by the receiver node, i.e., the calculated CRC
is different from the received.
1 = A CRC error occurred since last read of this register.
0 = No such occurrence
FRM_ERR Form Error
This bit indicates that a Form Error has been detected by the receiver node, i.e., a fixed-form bit field
contains at least one illegal bit.
1 = A Form Error occurred since last read of this register
0 = No such occurrence
STF_ERR Stuffing Error
This bit indicates that a Stuffing Error has been detected.
1 = A Stuffing Error occurred since last read of this register.
0 = No such occurrence.
TX_WRN TX Error Warning
This bit indicates when repetitive errors are occurring during message transmission.
1 = TX_Err_Counter 96
0 = No such occurrence
RX_WRN Rx Error Warning
This bit indicates when repetitive errors are occurring during message reception.
1 = Rx_Err_Counter 96
0 = No such occurrence
IDLE CAN bus IDLE state
This bit indicates when CAN bus is in IDLE state.
1 = CAN bus is now IDLE
0 = No such occurrence
TXRX Current FlexCAN status (transmitting/receiving)
This bit indicates if FlexCAN is transmitting or receiving a message when the CAN bus is not in IDLE
state. This bit has no meaning when IDLE is asserted.
1 = FlexCAN is transmitting a message (IDLE = 0)
0 = FlexCAN is receiving a message (IDLE = 0)
FLT_CONF Fault Confinement State
This field indicates the Confinement State of the FlexCAN module, as shown in Table 22-13. If the
LOM bit in the Control Register is asserted, the FLT_CONF field will indicate “Error Passive”. Since
the Control Register is not affected by soft reset, the FLT_CONF field will not be affected by soft
reset if the LOM bit is asserted.
Table 22-12. ESR field descriptions (continued)
Field Description