MPC5604B/C Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor 771
EFNCR Enable Flash Non-Correctable Reporting
The occurrence of a non-correctable multi-bit flash error generates a ECSM ECC interrupt request
as signalled by the assertion of ESR[FNCE]. The faulting address, attributes and data are also
captured in the PFEAR, PFEMR, PFEAT and PFEDR registers.
0 Reporting of non-correctable flash errors is disabled.
1 Reporting of non-correctable flash errors is enabled.
Table 31-8. ECR field descriptions (continued)
Field Description
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