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Intel ARCHITECTURE IA-32 - Page 6

Intel ARCHITECTURE IA-32
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vi
Floating-Point Stalls........................................................................................................ 2-72
x87 Floating-point Operations with Integer Operands .............................................. 2-72
x87 Floating-point Comparison Instructions ............................................................. 2-72
Transcendental Functions ........................................................................................ 2-72
Instruction Selection.............................................................................................................. 2-73
Complex Instructions...................................................................................................... 2-74
Use of the lea Instruction................................................................................................ 2-74
Use of the inc and dec Instructions ................................................................................ 2-75
Use of the shift and rotate Instructions........................................................................... 2-75
Flag Register Accesses.................................................................................................. 2-75
Integer Divide ................................................................................................................. 2-76
Operand Sizes and Partial Register Accesses............................................................... 2-76
Prefixes and Instruction Decoding.................................................................................. 2-80
REP Prefix and Data Movement..................................................................................... 2-81
Address Calculations...................................................................................................... 2-86
Clearing Registers.......................................................................................................... 2-87
Compares....................................................................................................................... 2-87
Floating Point/SIMD Operands....................................................................................... 2-88
Prolog Sequences.......................................................................................................... 2-90
Code Sequences that Operate on Memory Operands................................................... 2-90
Instruction Scheduling........................................................................................................... 2-91
Latencies and Resource Constraints.............................................................................. 2-91
Spill Scheduling.............................................................................................................. 2-92
Scheduling Rules for the Pentium 4 Processor Decoder ............................................... 2-92
Scheduling Rules for the Pentium M Processor Decoder .............................................. 2-93
Vectorization ......................................................................................................................... 2-93
Miscellaneous ....................................................................................................................... 2-95
NOPs.............................................................................................................................. 2-95
Summary of Rules and Suggestions..................................................................................... 2-96
User/Source Coding Rules............................................................................................. 2-97
Assembly/Compiler Coding Rules.................................................................................. 2-99
Tuning Suggestions...................................................................................................... 2-108
Chapter 3 Coding for SIMD Architectures
Checking for Processor Support of SIMD Technologies ......................................................... 3-2
Checking for MMX Technology Support ........................................................................... 3-2
Checking for Streaming SIMD Extensions Support.......................................................... 3-3
Checking for Streaming SIMD Extensions 2 Support....................................................... 3-5
Checking for Streaming SIMD Extensions 3 Support....................................................... 3-6

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