Intel ARCHITECTURE IA-32 User Manual

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Considerations for Code Conversion to SIMD Programming.................................................. 3-8
Identifying Hot Spots ...................................................................................................... 3-10
Determine If Code Benefits by Conversion to SIMD Execution...................................... 3-11
Coding Techniques ............................................................................................................... 3-12
Coding Methodologies.................................................................................................... 3-13
Assembly.................................................................................................................. 3-15
Intrinsics.................................................................................................................... 3-15
Classes..................................................................................................................... 3-17
Automatic Vectorization ............................................................................................ 3-18
Stack and Data Alignment..................................................................................................... 3-20
Alignment and Contiguity of Data Access Patterns........................................................ 3-20
Using Padding to Align Data..................................................................................... 3-20
Using Arrays to Make Data Contiguous.................................................................... 3-21
Stack Alignment For 128-bit SIMD Technologies ........................................................... 3-22
Data Alignment for MMX Technology ............................................................................. 3-23
Data Alignment for 128-bit data...................................................................................... 3-24
Compiler-Supported Alignment................................................................................. 3-24
Improving Memory Utilization................................................................................................ 3-27
Data Structure Layout..................................................................................................... 3-27
Strip Mining..................................................................................................................... 3-32
Loop Blocking................................................................................................................. 3-34
Instruction Selection.............................................................................................................. 3-37
SIMD Optimizations and Microarchitectures .................................................................. 3-38
Tuning the Final Application.................................................................................................. 3-39
Chapter 4 Optimizing for SIMD Integer Applications
General Rules on SIMD Integer Code .................................................................................... 4-2
Using SIMD Integer with x87 Floating-point............................................................................ 4-3
Using the EMMS Instruction............................................................................................. 4-3
Guidelines for Using EMMS Instruction............................................................................ 4-4
Data Alignment........................................................................................................................ 4-6
Data Movement Coding Techniques ....................................................................................... 4-6
Unsigned Unpack............................................................................................................. 4-6
Signed Unpack................................................................................................................. 4-7
Interleaved Pack with Saturation...................................................................................... 4-8
Interleaved Pack without Saturation............................................................................... 4-10
Non-Interleaved Unpack................................................................................................. 4-11
Extract Word................................................................................................................... 4-13
Insert Word..................................................................................................................... 4-14
Move Byte Mask to Integer............................................................................................. 4-16

Intel ARCHITECTURE IA-32 Specifications

General

Instruction Set	x86
Instruction Set Type	CISC
Memory Segmentation	Supported
Operating Modes	Real mode, Protected mode, Virtual 8086 mode
Max Physical Address Size	36 bits (with PAE)
Max Virtual Address Size	32 bits
Architecture	IA-32 (Intel Architecture 32-bit)
Addressable Memory	4 GB (with Physical Address Extension up to 64 GB)
Floating Point Registers	8 x 80-bit
MMX Registers	8 x 64-bit
SSE Registers	8 x 128-bit
Registers	General-purpose registers (EAX, EBX, ECX, EDX, ESI, EDI, ESP, EBP), Segment registers (CS, DS, SS, ES, FS, GS), Instruction pointer (EIP), Flags register (EFLAGS)
Floating Point Unit	Yes (x87)