MPC5604B/C Microcontroller Reference Manual, Rev. 8
146 Freescale Semiconductor
8.3.1.2 Mode Control Register (ME_MCTL)
This register is used to trigger software-controlled mode changes. Depending on the modes as enabled by
ME_ME register bits, configurations corresponding to unavailable modes are reserved and access to
ME_<mode>_MC registers must respect this for successful mode requests.
S_FXOSC fast external crystal oscillator (4-16 MHz) status
0 fast external crystal oscillator (4-16 MHz) is not stable
1 fast external crystal oscillator (4-16 MHz) is providing a stable clock
S_FIRC fast internal RC oscillator (16 MHz) status
0 fast internal RC oscillator (16 MHz) is not stable
1 fast internal RC oscillator (16 MHz) is providing a stable clock
S_SYSCLK System clock switch status — These bits specify the system clock currently used by the system.
0000 16 MHz int. RC osc.
0001 div. 16 MHz int. RC osc.
0010 4-16 MHz ext. xtal osc.
0011 div. ext. xtal osc.
0100 freq. mod. PLL
0101 reserved
0110 reserved
0111 reserved
1000 reserved
1001 reserved
1010 reserved
1011 reserved
1100 reserved
1101 reserved
1110 reserved
1111 system clock is disabled
Address 0xC3FD_C004 Access: Supervisor read/write
0123456789101112131415
R
TARGET_M OD E
000000000000
W
Reset0011000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R1010010100001111
W KEY
Reset1010010100001111
Figure 8-3. Mode Control Register (ME_MCTL)
Table 8-4. Global Status Register (ME_GS) Field Descriptions (continued)
Field Description
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