Freescale Semiconductor MPC5604B - Page 288

MPC5604B/C Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor 277
In software vector mode, the INTC_IACKR has side effects from reads. Therefore, it must not be
speculatively read while in this mode. The side effects are the same regardless of the size of the read.
Reading the INTC_IACKR does not have side effects in hardware vector mode.
16.5.2.4 INTC End-of-Interrupt Register (INTC_EOIR)
Writing to the end-of-interrupt register signals the end of the servicing of the interrupt request. When the
INTC_EOIR is written, the priority last pushed on the LIFO is popped into INTC_CPR. An exception to
this behavior is described in Section 16.4.1.2, “Hardware vector mode. The values and size of data written
to the INTC_EOIR are ignored. The values and sizes written to this register neither update the
INTC_EOIR contents or affect whether the LIFO pops. For possible future compatibility, write four bytes
of all 0s to the INTC_EOIR.
Reading the INTC_EOIR has no effect on the LIFO.
16.5.2.5 INTC Software Set/Clear Interrupt Registers
(INTC_SSCIR0_3–INTC_SSCIR4_7)
Offset: 0x0018 Access: Write only
012345678910111213141516171819202122232425262728293031
R00000000000000000000000000000000
WSee text
Reset
00000000000000000000000000000000
Figure 16-6. INTC End-of-Interrupt Register (INTC_EOIR)
Offset: 0x0020 Access: User read/write
0123456789101112131415
R 0 0 0 0 0 0 0
CLR0
0 0 0 0 0 0 0
CLR1
W SET0 SET1
Reset
0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0 0
CLR2
0 0 0 0 0 0 0
CLR3
W SET2 SET3
Reset
0000000000000000
Figure 16-7. INTC Software Set/Clear Interrupt Register 0–3 (INTC_SSCIR[0:3])