ST STM32F412 User Manual

RM0402 Rev 6 1101/1163
RM0402 USB on-the-go full-speed (OTG_FS)
1122
1. Before disabling any OUT endpoint, the application must enable Global OUT NAK
mode in the core.
– SGONAK = 1 in OTG_DCTL
2. Wait for the GONAKEFF interrupt (OTG_GINTSTS)
3. Disable the required OUT endpoint by programming the following fields:
– EPDIS = 1 in OTG_DOEPCTLx
– SNAK = 1 in OTG_DOEPCTLx
4. Wait for the EPDISD interrupt (OTG_DOEPINTx), which indicates that the OUT
endpoint is completely disabled. When the EPDISD interrupt is asserted, the core also
clears the following bits:
– EPDIS = 0 in OTG_DOEPCTLx
– EPENA = 0 in OTG_DOEPCTLx
5. The application must clear the Global OUT NAK bit to start receiving data from other
non-disabled OUT endpoints.
– SGONAK = 0 in OTG_DCTL
• Transfer Stop Programming for OUT endpoints
The application must use the following programing sequence to stop any transfers (because
of an interrupt from the host, typically a reset).
Sequence of operations:
1. Enable all OUT endpoints by setting
– EPENA = 1 in all N/A_DOEPCTLx registers.
2. Flush the RxFIFO as follows
– Poll N/A_GRSTCTL.AHBIDL until it is 1. This indicates that AHB master is idle.
– Perform read modify write operation on N/A_GRSTCTL.RXFFLSH =1
– Poll N/A_GRSTCTL.RXFFLSH until it is 0, but also using a timeout of less than 10
milli-seconds (corresponds to minimum reset signaling duration). If 0 is seen
before the timeout, then the RxFIFO flush is successful. If at the moment the
timeout occurs, there is still a 1, (this may be due to a packet on EP0 coming from
the host) then go back (once only) to the previous step (“Perform read modify write
operation”).
3. Before disabling any OUT endpoint, the application must enable Global OUT NAK
mode in the core, according to the instructions in “
Setting the global OUT NAK on
page 1099”. This ensures that data in the RxFIFO is sent to the application
successfully. Set SGONAK = 1 in N/A_DCTL
4. Wait for the GONAKEFF interrupt (N/A_GINTSTS)
5. Disable all active OUT endpoints by programming the following register bits:
– EPDIS = 1 in registers N/A_DOEPCTLx
– SNAK = 1 in registers N/A_DOEPCTLx
6. Wait for the EPDIS interrupt in N/A_DOEPINTx for each OUT endpoint programmed in
the previous step. The EPDIS interrupt in N/A_DOEPINTx indicates that the

ST STM32F412 Specifications

General

Brand	ST
Model	STM32F412
Category	Microcontrollers
Language	English