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ST STM32F412 User Manual

ST STM32F412
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RM0402 Rev 6 985/1163
RM0402 USB on-the-go full-speed (OTG_FS)
1122
the USB clock switching activity is cut even if the system clock is kept running by the
application for other purposes.
USB system stop
When the OTG_FS is in the USB suspended state, the application may decide to
drastically reduce the overall power consumption by a complete shut down of all the
clock sources in the system. USB System Stop is activated by first setting the Stop
PHY clock bit and then configuring the system deep sleep mode in the power control
system module (PWR).
The OTG_FS core automatically reactivates both system and USB clocks by
asynchronous detection of remote wakeup (as an host) or resume (as a device)
signaling on the USB.
To save dynamic power, the USB data FIFO is clocked only when accessed by the OTG_FS
core.
29.10 OTG_FS Dynamic update of the OTG_HFIR register
The USB core embeds a dynamic trimming capability of SOF framing period in host mode
allowing to synchronize an external device with the SOF frames.
When the OTG_HFIR register is changed within a current SOF frame, the SOF period
correction is applied in the next frame as described in
Figure 339.
For a dynamic update, it is required to set RLDCTRL=1.
Figure 339. Updating OTG_HFIR dynamically (RLDCTRL = 1)
29.11 OTG_FS data FIFOs
The USB system features 1.25 Kbytes of dedicated RAM with a sophisticated FIFO control
mechanism. The packet FIFO controller module in the OTG_FS core organizes RAM space
into Tx FIFOs into which the application pushes the data to be temporarily stored before the
USB transmission, and into a single Rx FIFO where the data received from the USB are
temporarily stored before retrieval (popped) by the application. The number of instructed
FIFOs and how these are organized inside the RAM depends on the device’s role. In
peripheral mode an additional Tx FIFO is instructed for each active IN endpoint. Any FIFO
size is software configured to better meet the application requirements.
ai18440b
SOF reload
OTG_HFIR write
OTG_HFIR value
Frame timer
400
0
1
400
0
1
399
399
450
0
1
449
... ... ...
450
0
1
449
...
400 450

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ST STM32F412 Specifications

General IconGeneral
BrandST
ModelSTM32F412
CategoryMicrocontrollers
LanguageEnglish

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