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ST STM32F412 User Manual

ST STM32F412
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RM0402 Rev 6 1015/1163
RM0402 USB on-the-go full-speed (OTG_FS)
1122
29.15.10 OTG status read and pop registers (OTG_GRXSTSP)
Address offset for pop: 0x020
Reset value: 0x0000 0000
This description is for register OTG_GRXSTSP in Device mode.
Similarly to OTG_GRXSTSR (receive status debug read register) where a read returns the
contents of the top of the receive FIFO, a read to OTG_GRXSTSP (receive status read and
pop register) additionally pops the top data entry out of the Rx FIFO.
The core ignores the receive status pop/read when the receive FIFO is empty and returns a
value of 0x0000
0000. The application must only pop the receive status FIFO when the
receive FIFO non-empty bit of the core interrupt register (RXFLVL bit in OTG_GINTSTS) is
asserted.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res.
STSPH
ST
Res. Res. FRMNUM[3:0] PKTSTS[3:0] DPID[1]
r rrrrrrrrr
1514131211109876543210
DPID[0] BCNT[10:0] EPNUM[3:0]
rrrrrrrrrrrrrrrr
Bits 31:28 Reserved, must be kept at reset value.
Bit 27 STSPHST: Status phase start
Indicates the start of the status phase for a control write transfer. This bit is set along with
the OUT transfer completed PKTSTS pattern.
Bits 26:25 Reserved, must be kept at reset value.
Bits 24:21 FRMNUM[3:0]: Frame number
This is the least significant 4 bits of the frame number in which the packet is received on the
USB. This field is supported only when isochronous OUT endpoints are supported.
Bits 20:17 PKTSTS[3:0]: Packet status
Indicates the status of the received packet
0001: Global OUT NAK (triggers an interrupt)
0010: OUT data packet received
0011: OUT transfer completed (triggers an interrupt)
0100: SETUP transaction completed (triggers an interrupt)
0110: SETUP data packet received
Others: Reserved
Bits 16:15 DPID[1:0]: Data PID
Indicates the data PID of the received OUT data packet
00: DATA0
10: DATA1
Bits 14:4 BCNT[10:0]: Byte count
Indicates the byte count of the received data packet.
Bits 3:0 EPNUM[3:0]: Endpoint number
Indicates the endpoint number to which the current received packet belongs.

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ST STM32F412 Specifications

General IconGeneral
BrandST
ModelSTM32F412
CategoryMicrocontrollers
LanguageEnglish

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