ST STM32F412 User Manual

Reset and clock control (RCC) for STM32F412xx RM0402
136/1163 RM0402 Rev 6
6.3.9 RCC APB2 peripheral reset register (RCC_APB2RSTR)
Address offset: 0x24
Reset value: 0x0000 0000
Access: no wait state, word, half-word and byte access.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res.
DFSDM1
RST
Res. Res. Res.
SPI5
RST
Res.
TIM11
RST
TIM10
RST
TIM9
RST
rw rw rw rw rw
15 14 13 12 11 10 9 8 7 6 5 4 Res. 21 0
Res.
SYSCFG
RST
SPI4
RST
SPI1
RST
SDIO
RST
Res. Res.
ADC1
RST
Res. Res.
USART6
RST
USART1
RST
Res. Res.
TIM8
RST
TIM1
RST
rw rw rw rw rw rw rw rw rw
Bits 31:25 Reserved, must be kept at reset value.
Bit 24 DFSDM1RST: DFSDM1 reset
Set and cleared by software.
0: does not reset DFSDM1
1: resets DFSDM1
Bits 23:21 Reserved, always read as 0.
Bit 20 SPI5RST: SPI5RST
This bit is set and cleared by software.
0: does not reset SPI5
1: resets SPI5
Bit 19 Reserved, must be kept at reset value.
Bit 18 TIM11RST: TIM11 reset
Set and cleared by software.
0: does not reset TIM11
1: resets TIM11
Bit 17 TIM10RST: TIM10 reset
Set and cleared by software.
0: does not reset TIM10
1: resets TIM10
Bit 16 TIM9RST: TIM9 reset
Set and cleared by software.
0: does not reset TIM9
1: resets TIM9
Bit 15 Reserved, must be kept at reset value.
Bit 14 SYSCFGRST: System configuration controller reset
Set and cleared by software.
0: does not reset the System configuration controller
1: resets the System configuration controller
Bit 13 SPI4RST: SPI4 reset
Set and reset by software.
0: does not reset SPI4
1: resets SPI4

ST STM32F412 Specifications

General

Brand	ST
Model	STM32F412
Category	Microcontrollers
Language	English