ST STM32F412 User Manual

Universal synchronous receiver transmitter (USART) /universal asynchronous receiver transmit-
782/1163 RM0402 Rev 6
25.4.5 USART receiver tolerance to clock deviation
The USART asynchronous receiver works correctly only if the total clock system deviation is
smaller than the USART receiver tolerance. The causes that contribute to the total deviation
are:
• DTRA: Deviation due to the transmitter error (also includes the deviation of the
transmitter local oscillator)
• DQUANT: Error due to the baud rate quantization of the receiver
• DREC: Deviation of the receiver local oscillator
• DTCL: Deviation due to the transmission line (generally due to the transceivers that
can introduce an asymmetry between the low-to-high transition timing and the
high-to-low transition timing)
DTRA + DQUANT + DREC + DTCL < USART receiver tolerance
Table 149. Error calculation for programmed baud rates at f
PCLK
= 100 MHz or f
PCLK
= 50 MHz,
oversampling by 8
(1)(2)
Oversampling by 8 (OVER8=1)
Baud rate f
PCLK
= 100 MHz f
PCLK
= 50 MHz
S.No Desired Actual
Value
programmed
in the baud
rate register
% Error =
(Calculated -
Desired)B.Rate
/Desired B.Rate
Actual
Value
programmed
in the baud
rate register
%
Error
1 9.600 KBps 9.601 KBps 1302 0.006 9.601 KBps 651 0.006
2 19.200 KBps 19.201 KBps 651 0.006 19.201 KBps 325.5 0.006
3 38.400 KBps 38.402 KBps 325.5 0.006 38.402 KBps 162.75 0.006
4 57.600 KBps 57.603 KBps 217 0.006 57.603 KBps 108.5 0.006
5 115.200 KBps 115.207 KBps 108.5 0.006 115.207 KBps 54.25 0.006
6 230.400 KBps 230.414 KBps 54.25 0.006 230.414 KBps 27.125 0.006
7 460.800 KBps 460.829 KBps 27.125 0.006 462.962 KBps 13.5 0.470
8 921.600 KBps 925.925 KBps 13.5 0.470 925.925 KBps 6.75 0.470
9 4.000 MBps 4 MBps 3.125 0.000 4.167 MBps 1.5 4.170
10 6.250 MBps 6.25 MBps 2 0.000 6.250 MBps 1 0.000
11 12.500 MBps 12.500 MBps 1 0.000 NA NA NA
1. The lower the CPU clock the lower the accuracy for a particular baud rate. The upper limit of the achievable baud rate can
be fixed with these data.
2. Only USART1 and USART6 are clocked with PCLK2. Other USARTs are clocked with PCLK1. Refer to the device
datasheets for the maximum values for PCLK1 and PCLK2.

ST STM32F412 Specifications

General

Brand	ST
Model	STM32F412
Category	Microcontrollers
Language	English