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ST STM32F412 User Manual

ST STM32F412
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USB on-the-go full-speed (OTG_FS) RM0402
1014/1163 RM0402 Rev 6
29.15.9 OTG receive status debug read [alternate] (OTG_GRXSTSR)
Address offset for read: 0x01C
Reset value: 0x0000 0000
This description is for register OTG_GRXSTSR in Host mode.
A read to the receive status debug read register returns the contents of the top of the
receive FIFO.
The core ignores the receive status read when the receive FIFO is empty and returns a
value of 0x0000
0000.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. PKTSTS[3:0] DPID
rrrrr
1514131211109876543210
DPID BCNT[10:0] CHNUM[3:0]
rrrrrrrrrrrrrrrr
Bits 31:21 Reserved, must be kept at reset value.
Bits 20:17 PKTSTS[3:0]: Packet status
Indicates the status of the received packet
0010: IN data packet received
0011: IN transfer completed (triggers an interrupt)
0101: Data toggle error (triggers an interrupt)
0111: Channel halted (triggers an interrupt)
Others: Reserved
Bits 16:15 DPID[1:0]: Data PID
Indicates the data PID of the received packet
00: DATA0
10: DATA1
Bits 14:4 BCNT[10:0]: Byte count
Indicates the byte count of the received IN data packet.
Bits 3:0 CHNUM[3:0]: Channel number
Indicates the channel number to which the current received packet belongs.

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ST STM32F412 Specifications

General IconGeneral
BrandST
ModelSTM32F412
CategoryMicrocontrollers
LanguageEnglish

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