ST STM32F412 User Manual

RM0402 Rev 6 867/1163
RM0402 Secure digital input/output interface (SDIO)
921
27.3.1 SDIO adapter
Figure 310 shows a simplified block diagram of an SDIO adapter.
Figure 310. SDIO adapter
The SDIO adapter is a multimedia/secure digital memory card bus master that provides an
interface to a multimedia card stack or to a secure digital memory card. It consists of five
subunits:
• Adapter register block
• Control unit
• Command path
• Data path
• Data FIFO
Note: The adapter registers and FIFO use the APB2 bus clock domain (PCLK2). The control unit,
command path and data path use the SDIO adapter clock domain (SDIOCLK).
Adapter register block
The adapter register block contains all system registers. This block also generates the
signals that clear the static flags in the multimedia card. The clear signals are generated
when 1 is written into the corresponding bit location in the SDIO Clear register.
Control unit
The control unit contains the power management functions and the clock divider for the
memory card clock.
There are three power phases:
• power-off
• power-up
• power-on
MSv36074V1
To APB2
interface
Control unit
Command
path
Data path
Adapter
registers
SDIO_CK
SDIO_CMD
SDIO_D[7:0]
SDIO adapter
PCLK2 SDIOCLK
FIFO
Card bus

ST STM32F412 Specifications

General

Brand	ST
Model	STM32F412
Category	Microcontrollers
Language	English