ST STM32F412 User Manual

RM0402 Rev 6 371/1163
RM0402 Digital filter for sigma delta modulators (DFSDM)
400
14.4.13 Data unit block
The data unit block is the last block of the whole processing path: External Σ∆ modulators -
Serial transceivers - Sinc filter - Integrator - Data unit block.
The output data rate depends on the serial data stream rate, and filter and integrator
settings. The maximum output data rate is:
or
Maximum output data rate in case of parallel data input:
or
or
The right bit-shift of final data is performed in this module because the final data width is 24-
bit and data coming from the processing path can be up to 32 bits. This right bit-shift is
configurable in the range 0-31 bits for each selected input channel (see DTRBS[4:0] bits in
DFSDM_CHyCFGR2 register). The right bit-shift is rounding the result to nearest integer
value. The sign of shifted result is maintained - to have valid 24-bit signed format of result
data.
In the next step, an offset correction of the result is performed. The offset correction value
(OFFSET[23:0] stored in register DFSDM_CHyCFGR2) is subtracted from the output data
for a given channel. Data in the OFFSET[23:0] field is set by software by the appropriate
calibration routine.
Due to the fact that all operations in digital processing are performed on 32-bit signed
registers, the following conditions must be fulfilled not to overflow the result:
FOSR
FORD
. IOSR <= 2
31
... for Sinc
x
filters, x = 1..5)
2 . FOSR
2
. IOSR <= 2
31
... for FastSinc filter)
Datarate samples s⁄
f
CKIN
F
OSR
I
OSR
1– F
ORD
+()F
ORD
1+()+⋅
-------------------------------------------------------------------------------------------------------= ...FAST = 0, Sincx filter
Datarate samples s⁄
f
CKIN
F
OSR
I
OSR
1– 4+()21+()+⋅
--------------------------------------------------------------------------------= ...FAST = 0, FastSinc filter
Datarate samples s⁄
f
CKIN
F
OSR
I
OSR
⋅
-------------------------------= ...FAST = 1
Datarate samples s⁄
f
DATAIN_RATE
F
OSR
I
OSR
1– F
ORD
+()F
ORD
1+()+⋅
-------------------------------------------------------------------------------------------------------= ...FAST = 0, Sincx filter
Datarate samples s⁄
f
DATAIN_RATE
F
OSR
I
OSR
1– 4+()21+()+⋅
--------------------------------------------------------------------------------= ...FAST = 0, FastSinc filter
Datarate samples s⁄
f
DATAIN_RATE
F
OSR
I
OSR
⋅
------------------------------------= ...FAST=1 or any filter bypass case F
OSR
1=()
where: f
DATAIN_RATE
...input data rate from CPU/DMA

ST STM32F412 Specifications

General

Brand	ST
Model	STM32F412
Category	Microcontrollers
Language	English