ST STM32F412 - Figure 128. Counter Timing Diagram, Internal Clock Divided by 1; Figure 129. Counter Timing Diagram, Internal Clock Divided by 2; Figure 130. Counter Timing Diagram, Internal Clock Divided by 4

General-purpose timers (TIM2 to TIM5) RM0402
488/1163 RM0402 Rev 6
Figure 128. Counter timing diagram, internal clock divided by 1
Figure 129. Counter timing diagram, internal clock divided by 2
Figure 130. Counter timing diagram, internal clock divided by 4
00 02 03 04 05 06 0733 34 35 3631
MS35836V1
CK_INT
CNT_EN
Timerclock = CK_CNT
Counter register
Update event (UEV)
Counter overflow
Update interrupt flag (UIF)
0132
MS35835V1
CK_INT
CNT_EN
Timerclock = CK_CNT
Counter register
Update event (UEV)
Counter overflow
Update interrupt flag (UIF)
0034 0035 0036 0000 0001 0002 0003
0000 00010035 0036
MSv37301V1
CK_INT
Timerclock = CK_CNT
Counter register
Update event (UEV)
Counter overflow
Update interrupt flag (UIF)
CNT_EN