ST STM32F412 - Figure 169. Triggering Timer 2 with Enable of Timer 1

General-purpose timers (TIM2 to TIM5) RM0402
520/1163 RM0402 Rev 6
Figure 169. Triggering timer 2 with Enable of timer 1
Using one timer as prescaler for another timer
For example, Timer 1 can be configured to act as a prescaler for Timer 2. Refer to
Figure 165 for connections. To do this:
• Configure Timer 1 master mode to send its Update Event (UEV) as trigger output
(MMS=010 in the TIM1_CR2 register). then it outputs a periodic signal on each counter
overflow.
• Configure the Timer 1 period (TIM1_ARR registers).
• Configure Timer 2 to get the input trigger from Timer 1 (TS=000 in the TIM2_SMCR
register).
• Configure Timer 2 in external clock mode 1 (SMS=111 in TIM2_SMCR register).
• Start Timer 2 by writing ‘1 in the CEN bit (TIM2_CR1 register).
• Start Timer 1 by writing ‘1 in the CEN bit (TIM1_CR1 register).
Starting 2 timers synchronously in response to an external trigger
In this example, we set the enable of timer 1 when its TI1 input rises, and the enable of
Timer 2 with the enable of Timer 1. Refer to
Figure 165 for connections. To ensure the
MS37391V1
Write TIF = 0
CK_INT
TIMER2-CNT
TIMER1-CNT_INIT
TIMER1-CEN=CNT_EN
TIMER2-TIF
E7
0200 01
E9
75
CD 00 E8 EA
TIMER1-CNT
TIMER2-CNT_INIT
TIMER2-write CNT