ST STM32F412 User Manual

General-purpose timers (TIM2 to TIM5) RM0402
492/1163 RM0402 Rev 6
Figure 137. Counter timing diagram, internal clock divided by N
Figure 138. Counter timing diagram, Update event
Center-aligned mode (up/down counting)
In center-aligned mode, the counter counts from 0 to the auto-reload value (content of the
TIMx_ARR register) – 1, generates a counter overflow event, then counts from the auto-
reload value down to 1 and generates a counter underflow event. Then it restarts counting
from 0.
Center-aligned mode is active when the CMS bits in TIMx_CR1 register are not equal to
'00'. The Output compare interrupt flag of channels configured in output is set when: the
counter counts down (Center aligned mode 1, CMS = "01"), the counter counts up (Center
aligned mode 2, CMS = "10") the counter counts up and down (Center aligned mode 3,
CMS = "11").
MS37340V1
001F20
CK_INT
Timerclock = CK_CNT
Counter register
Update event (UEV)
Counter overflow
Update interrupt flag (UIF)
36
MS37341V1
FF 36
CK_INT
Timerclock = CK_CNT
Counter register
Update event (UEV)
Counter overflow
Update interrupt flag (UIF)
01
CNT_EN
Auto-reload preload register
Write a new value in TIMx_ARR
00 3605 04 03 02 35 34 33 32 31 30 2F

ST STM32F412 Specifications

General

Brand	ST
Model	STM32F412
Category	Microcontrollers
Language	English